1. Field of the Invention
The present invention generally relates to a method for forming a thin-film stacked body, particularly to a method for forming a thin-film stacked body used for, e.g., three dimensional memory cells.
2. Description of the Related Art
Explosive growth of smartphones and tablet terminals is expected to drive the NAND flash memory market to become a 56-billion U.S. dollar market in 2014 compared to the 22-billion U.S. dollar market size in 2010. On the other hand, the price per unit memory size is likely to drop from 2 U.S. dollars per gigabyte in 2010 to 0.5 U.S. dollar per gigabyte in 2014. 64- to 128-gigabit products of the 2Xnm generation whose mass-production begins in 2011 or 2012 are considered feasible as an extension of conventional technology, while the new technology called “three-dimensional cell” may allow the market to drive down the cost of new T-bit NAND flash memories that are expected to be available in the future, at the same pace as before.
The 3-dimensional cell technology reduces the manufacturing cost by stacking memory cells on a chip instead of using the traditional single-layer structure. Stacking chips adds to cost proportional to the number of stacked layers, but 3-dimensional cell technology can minimize the cost increase even when the number of layers is increased. As a result, this technology can dramatically reduce the cost per bit by allowing the number of layers to increase, while still permitting use of the old-generation microfabrication technology.
NAND flash memories based on the 3-dimensional cell technology are largely classified into two types. One is the “vertical channel (VC)” type where channels are arranged in the vertical direction, and the other is the “vertical gate (VG)” type where gate electrodes are arranged in the vertical direction. In the case of thin-film laminates, application to the VC type is being considered.